Many uses for the parallel port in ECP mode
About the parallel port
First you need a driver to allow your program to directly access the port.
PortTalk works good and it also works with extended registers
Routines for accessing I/O ports are in /usr/include/asm/io.h (or linux/include/asm-i386/io.h in the kernel source distribution).
The routines there are inline macros, so it is enough to #include <asm/io.h>; you do not need any additional libraries.
ioperm() can only give access to ports 0x000 through 0x3ff;
for higher ports, you need to use iopl()
(which gives you access to all ports at once). Use the level argument 3 (i.e., iopl(3))
First you need to know where the Registers are.
Published standards are not available online, however draft version are.
(Base + 0 ) = Data or ECP FIFO (Address)
(Base + 1 ) = Status Register
(Base + 2 ) = Control Register
(Base + 0x400 ) = ECP FIFO (Data)
(Base + 0x402 ) = Extended Control Reg.
When in mode 7 (Base + 0x400) is Configuration Registers A and (Base + 0x401) is Configuration Registers B
We are interested in only three modes. These are Mode 1 which allows complete control of the port, Mode 3 which enables the FIFO's, and Mode 7 which allows us to detect and configure the port.
Note: The ECP standard allows the word size to be larger than a byte, All port's I have found have a word size of 1 byte.
a stable timebase
The 1284 standard is quite complex, however the port is actually very simple.
If you look at the ECP mode 1284 standard.PDF(2394K) you will see that each FIFO uses only three pins.
The receive FIFO is very similar except that it is only 8 bits wide and uses HostAck (nAutoFd) and PeriphClk (nAck).
So to create a stable timebase connect an inverted Delay from HostClk
(nStrobe) to PeriphAck (Busy).
The simplest is a R/C delay followed by a 74hc14 shmitt(sp?) trigger inverter.
Next you will need to keep the FIFO full by constantly checking the Full (Extended Control Reg Bit 1) status bit and adding bytes accordingly. Most motherboard implementations are 16 bytes deep, however there are cards with larger buffers.
The PC parallel port can be used to control stepper motors by adding drivers that are capable of handling the current that the stepper motor draws.
Two steppers can be driven using the 8 data bits and driver transistors.
Alternately you could use a series of latches and counters.
Another option is to use a serial to parallel converter (74xx165) so
that each output write adds one bit to each of 8 strings.
Using Alergo5841.PDF(175K) a large array of stepper motors could be controlled.
You would write to the "FIFO data register" once for each bit and then write "FIFO Address register" to latch the units.